Neutral technical data plate for SN74AUP1G00DCKT

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Exact MPN22 sourced attributes2 manufacturer documents

Texas Instruments · exact orderable part

SN74AUP1G00DCKT

Technical overview of TI SN74AUP1G00DCKT, a single two-input NAND gate for 0.8 V to 3.6 V systems in a 5-pin SC70 package with 250-piece tape-and-reel packing.

Logic function: Single 2-input positive NAND
Logic family: AUP
Channels: 1
Inputs per channel: 2
Supply voltage: 0.8 V to 3.6 V
Input tolerance: 3.6 V tolerant

Original manufacturerCommercial terms confirmed per lot

ManufacturerTexas Instruments

Package / caseSC70 (DCK), 5 pins

Mounting typesurface mount

Lifecycleactive

PackingSmall tape and reel

Temperature grade−40 °C to +85 °C

Technical parameters

Technical specifications

22 normalized values · 2 manufacturer sources

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SN74AUP1G00DCKT technical parameters
Parameter	Value
Logic function	Single 2-input positive NAND [2]
Logic family	AUP [2]
Channels	1 [2]
Inputs per channel	2 [2]
Supply voltage	0.8 V to 3.6 V [2]
Input tolerance	3.6 V tolerant [2]
Input type	Standard CMOS [2]
Output type	Push-pull [2]
Maximum low-level output current	4 mA [2]
Maximum high-level output current	−4 mA [2]
Maximum propagation delay	4.8 ns at 3.3 V [2]
Maximum static supply current	0.9 µA [2]
Typical power-dissipation capacitance	4 pF at 3.3 V [2]
Typical input capacitance	1.5 pF [2]
Typical input hysteresis	250 mV at 3.3 V [2]
Operating temperature	−40 °C to +85 °C [2]
Package	SC70 (DCK), 5 pins [1]
Carrier	Small tape and reel [1]
Standard reel quantity	250 [1]
Part marking	HAR [1]
Moisture sensitivity	MSL 1, 260 °C unlimited [1]
Power-off behavior	Ioff partial-power-down support [2]

Specification references[1]SN74AUP1G00 Low-Power Single 2-Input Positive-NAND Gate datasheet ↗[2]SN74AUP1G00 product information ↗

Product overview

SN74AUP1G00DCKT at a glance

SN74AUP1G00DCKT implements one two-input positive NAND function in TI's ultra-low-power AUP logic family. It operates from 0.8 V to 3.6 V, accepts 3.6 V-tolerant inputs for mixed-voltage use and supports Ioff partial-power-down behavior. The exact DCKT ordering code selects a five-pin SC70 package and 250-piece small tape-and-reel carrier.

Key features

Verified device capabilities

The AUP design specifies low static current and modest dynamic capacitance for battery-sensitive logic paths.
The gate operates across a 0.8 V to 3.6 V supply range.
Inputs tolerate 3.6 V and Ioff supports partial-power-down and back-drive protection.
DCKT identifies a five-pin SC70 package supplied on a 250-piece small tape-and-reel carrier.

Applications

Where the device is used

Low quiescent power and sub-1 V operation suit always-on control and glue logic in battery-powered systems.
3.6 V-tolerant inputs can connect higher-voltage logic signals to a lower-voltage AUP supply within datasheet limits.
A two-input NAND gate can combine enable or fault signals and produce an inverted coincidence function.
TI identifies the family as suitable for point-to-point applications where compact logic conditioning is required.

Ordering information

Exact code and packing

Design notes

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Technical and ordering FAQ

Questions buyers ask about SN74AUP1G00DCKT

Answers distinguish the IC itself from assembled modules and keep absolute limits separate from normal operating conditions.

What Boolean function does SN74AUP1G00DCKT implement?

It implements one two-input positive NAND gate: the output is low only when both inputs are high.

What supply range is supported?

The gate is specified for operation from 0.8 V to 3.6 V.

What does the DCKT package code mean?

It identifies the five-pin SC70 DCK package supplied as a 250-piece small tape-and-reel orderable configuration.

Catalog relationships

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This page describes one orderable part. A family page helps select suffixes but never carries assumed stock or a price.

ManufacturerTexas InstrumentsView brand page →CategoryNAND GatesView category page →Part familySN74AUP1G00Compare exact variants →

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